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PCI Express PIPE PHY Transceiver IP
SMS5000 PCI Express PHY Transceiver IP (PIPE compliant) supports PCI Express Applications with the following features:
- Supports 2.5Gb/s serial data rate
- Utilizes 8-bit or 16-bit parallel interface to transmit and receive PCI Express data
- Full Support for Auxiliary Power (Vaux) for Energy aware systems like Multi-Port Host Controllers
- Data and clock recovery from serial stream on the PCI Express bus
- Supports direct disparity control for use in transmitting compliance pattern
- 8b/10b encode/decode and error indication
- Receiver detection
- De-emphasis at Transmit
- Electrical Idle Generation & Detection
- Lane Polarity Inversion Support
- Loop-back Support
- Spread Spectrum Clock Support
- Embedded Bit Error Rate Testing Through PBRS generation and detection
- ESD & Short Circuit Protection
- Scrambling Disable Feature
- Beacon transmission and detection
- Direct Disparity Control Support for use in transmitting compliance pattern
- Full low cost, low power CMOS Implementation
- Modular architecture supports 1,2,4,8,16 Lane applications
- Silicon Optimized, Proprietary architecture yields very small silicon area
- Hot Swap, Hot Plug Support
SMS5000
PCI Express PHY PIPE Transceiver Data Sheet
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